There are two issues here. How to tell EasyEDA that two pads on a package are internally connected which is covered here: [https://easyeda.com/forum/topic/How-to-avoid-DRC-errors-when-connecting-to-PCB-Footprints-a-k-a-PCB-Libs-90bf944fe3644b21a7d27a9e9d8df8d6](https://easyeda.com/forum/topic/How-to-avoid-DRC-errors-when-connecting-to-PCB-Footprints-a-k-a-PCB-Libs-90bf944fe3644b21a7d27a9e9d8df8d6)<br> <br> How to tell the PCB Editor not to ratline them together in the PCB Editor which is not yet resolved: [https://easyeda.com/forum/topic/Not-Connected-feature-for-unconnected-pads-in-Footprints-with-multuple-same-numbered-pads-on-PCB-03f61e1a8ed342b7a5be79e0dab765e5](https://easyeda.com/forum/topic/Not-Connected-feature-for-unconnected-pads-in-Footprints-with-multuple-same-numbered-pads-on-PCB-03f61e1a8ed342b7a5be79e0dab765e5)<br> <br> If you take the example of a TO-220 packaged mosfet device where the centre Drain pin and the Drain tab are internally connected, a solution is to use a schematic symbol with 4 pins with two for the Drain and number them individually. Then in the schematic put a Not Connected X symbol on one of the Drain pins. Choose or make a 4 pin numbered TO-220 Footprint and assign that to the symbol with the appropriate pin numbering order. When the Footprint is pulled into the PCB, the pad with the Not Connected symbol applied in the schematic will not be ratlined. However, I'm not sure but you may need to apply a unique netname to that pad in the PCB to ensure it is not accidentally connected to by a track or a copper area running over it. If so you must also check that that netname is not overwritten by any Update PCB or Import Changes operation. Try it out in s dummy project. :)

Not sure if I am miss understand the solution or it won't work or at least break DRC. Just an simple example: SMD jumper 

* I'm not sure I don't understand the solution

As explained in my Feature Request: [https://easyeda.com/forum/topic/Net-tie-a-copper-only-component-with-2-pads-to-split-nets-without-DRC-errors-and-multiple-netname-warnings-b6a099bf01bb4055b821ab398ee37b60](https://easyeda.com/forum/topic/Net-tie-a-copper-only-component-with-2-pads-to-split-nets-without-DRC-errors-and-multiple-netname-warnings-b6a099bf01bb4055b821ab398ee37b60)<br> <br> at the moment, EasyEDA has no concept of a Net-tie. Therefore if two nets have the same name then they are the same net and so they are joined. End of. The converse of joining together two nets with different names is discussed in: [https://easyeda.com/forum/topic/NET-bug-46d9338be2ec46888cb2a8cc3afd2bb9](https://easyeda.com/forum/topic/NET-bug-46d9338be2ec46888cb2a8cc3afd2bb9)<br> <br>

Also, my first reply in: [https://easyeda.com/forum/topic/MERGE-POINT-Merging-a-Digital-and-Analog-ground-together-97285eff92e745b4b5d5dff8bf21369b](https://easyeda.com/forum/topic/MERGE-POINT-Merging-a-Digital-and-Analog-ground-together-97285eff92e745b4b5d5dff8bf21369b)