You need to use EasyEDA editor to create some projects before publishing
solid region within footprint
391 1
DesignOvations 2 years ago
I have a need to attach a wire to a PCB. My footprint produces a plated slot on the edge of the board that the conductor bundle is dragged into, retained in the slot, soldered then the extra wire trimmed. This is a lot easier and quicker than trying to poke the wires through a hole. If the insulation is stripped and the conductor only bared for  a few mm the bundle is restrained by the insulation that is discarded after soldering.  ![wire term 3D small.jpg](//image.easyeda.com/pullimage/NP0qMH3pBgVhTd4Uutc0OaXYh81dv1rCJImd5Mpg.jpeg).![wire term footprint small.jpg](//image.easyeda.com/pullimage/06r5gxR4vcilmdmwMgKMbEtrQ55V4ejuyX3p4iHl.jpeg) The footprint has a solid copper region  around the pads. When I attempt to rout to the footprint, I cannot get out of because I assume the copper has not assumed the netname of the pads. How do I declare the net of the copper within my footprint? Peter Clark, Bendigo Australia
Comments
andyfierman 2 years ago
[https://easyeda.com/forum/topic/How-to-avoid-DRC-errors-when-connecting-to-PCB-Footprints-a-k-a-PCB-Libs-90bf944fe3644b21a7d27a9e9d8df8d6](https://easyeda.com/forum/topic/How-to-avoid-DRC-errors-when-connecting-to-PCB-Footprints-a-k-a-PCB-Libs-90bf944fe3644b21a7d27a9e9d8df8d6)
Reply
Login or Register to add a comment
goToTop
你现在访问的是EasyEDA海外版,建议访问速度更快的国内版 https://lceda.cn(需要重新注册)
如果需要转移工程请在个人中心 - 工程 - 工程高级设置 - 下载工程,下载后在https://lceda.cn/editor 打开保存即可。
有问题联系QQ 3001956291 不再提醒
svg-battery svg-battery-wifi svg-books svg-more svg-paste svg-pencil svg-plant svg-ruler svg-share svg-user svg-logo-cn svg-double-arrow -mockplus- -mockplus- -mockplus- -mockplus- -mockplus- -mockplus- -mockplus- -mockplus-@1x -mockplus-

Cookie Notice

Our website uses essential cookies to help us ensure that it is working as expected, and uses optional analytics cookies to offer you a better browsing experience. To find out more, read our Cookie Notice