Update Record

What's new in v6.2.46



  • Fix when grouped a symbol at schematic will cause save fail issue

What's new in v6.2.45



  • Fix round solid region rotates 90 degree will fail to generate Gerber issue
  • Fix some situation export PDF fail issue; Fix Dimension tool export to PDF the line width incorrect issue
  • Update EElibs

What's new in v6.2.44



  • Fix when polygon pad setting negative solder mask expansion and paste mask expansion will cause error issue

What's new in v6.2.43



  • Fix solder mask expansion fail issue
  • Fix combine net fail issue
  • Fix when export the PDF, the solder mask layer can't mirror issue
  • Fix when using hotkey H, the ratline will not hightlight issue
  • Fix when export the PDF, some text will crash issue
  • Fix MOSFET simulation model incorrect issue

What's new in v6.2.41



  • Fix when export schematic to PDF, the net port filled black color issue, the text location will change issue
  • Fix Board Cutout(NPTH) will cause the DRC error with inner plane layer issue
  • Fix the Pin orientation setting incorrect issue
  • Fix other issue

What's new in v6.2.38



  • Add Board Cutout for assembly option of PDF export
  • Fix big PCB export DXF fail issue
  • Fix some teardrop issue
  • Fix some remove loop issue
  • Fix sometimes Footpirnt Manager can't update issue
  • Modify export Pick and Place dialog description
  • Support to export the small drill hole size for Gerber which is less than 0.2mm
  • Improve netport picking
  • Board Cutout support to DRC check

What's new in v6.2.35



  • While click a net at Design Manager, keep the net hightlight on the canvas
  • Ignore DRC error with Copper Area while apply Teardrops
  • Fix DRC error doesn't point to correct location issue after import changes
  • Fix NetLabel can't modify font family issue
  • Fix delete wire segment fail issue
  • Fix when input special charater in rotation will cause the incrrect data issue
  • Fix when PCB over 1.2 meter, and unit is milimeter, the Gerber will incorrect issue
  • Fix some simulation issue

What's new in v6.2.34


New Features

  • 'Smart Dimension' in PCBLibs, via " Tools - Smart Dimension"
  • New features of copper area
    • Setting a distance from copper area to the board outline.
    • Setting to clear the sharp corner of the copper area, at "Improve Fabrication".
    • Setting the line width and spacing for the grid copper.
  • New simulation
    • Click to the logo in upper left corner to switch to simulation mode.
    • Only support the spice symbols which are the EElib at simulation mode.
    • Multiple instruments simulation are supported.
    • A lot of simulation models which are based on LTspice.
    • The simulation libs have 3D styles.
  • PDF exportings can be generated by editor.
    • The outline of the objects can be exported in PCB
    • Large documents being exported to PDF would not fail.
    • Multiple layers merged could be exported.
  • New 3D view
  • Users can classfy projects in terms of who the projects belong to.
  • The project lists could switch "Work Space" (You must joined the educating team).
  • The interface of the Personal libs and Team libs are integrated in 'working Space'.
  • All the elements belong to a same net will display highlightly when mouse cursor moving on the tracks.
  • Objects support to offset by relative reference point.
  • Modify the trick click interaction: First click to select the entire track, click again to select a single segment of the track.
  • Support the track right-click menu to select the tracks of the entire network, choose an area to select part of a track.
  • Sheet table of schemetics and PCBs support to customize.
  • Stamp hole panelize is supported.
  • Support change layers automatically when you try to route other layer track.
  • Walk Around for the track in Alpha version.
  • Cartesian coordinate system existed in canvas.
  • Switching to elements in the same locaton and they keep out each other by using shotkey 'G'.
  • Right-click menu of compontents shows the "View Datasheet".
  • You can pull out the extension line in Size Tool.
  • Copper Menu was added to canvas right-click menu.
  • When moving footprint, it will adsorbed automatically once the cursor close to the center of the pads or the original point of the footprint.
  • Tracks and arcs could modify their properties batched at the same time.
  • There is a choose in System Settings to demand whether finish tracking automatically or not.
  • The NetFlags support to hide their names.
  • Personal preferences would be loaded to the server.
  • Once you click the button'Convert to PCB', it wil check out are there errors to your schemetic nets.
  • Non-signal layers trakcs also support Real-time Track Length .
  • Components being selected in schemetic corresponding to highlight components at PCB.
  • Design Manager and Footpirnt Manager support secondary catalog display of the subpart.
  • You can review PCB photoes in white.
  • It could add teardrops automatically when routing tracks, which launched in system settings.
  • You can set Solder Mask Expansion and Paste Mask Expansion as a negative value.
  • No-official libs could also report errors.
  • Elements selected in canvas can be cancelled by 'Esc'.
  • The position of the Footprints' name of the PCB can be changed same as Prefix Position.
  • Rect in PCB can be converted to slots by right-click, and you can set nets to them.
  • You can adjust tracks width when you importing a DXF into PCB.
  • You can put No Connect Flag to Wire now.
  • You can choose whether mirror the bottom layer component coordinates or not when exporting coordinate file. The JLCPCB.com doesn't need it. one part of the PCB manufactures need this option.
  • Support to cute silksreen automatically in PCBLib, there ia a switch to demand launch or terminate it in the right-hand properties panel.
  • Projects support to be cloned.


  • Solve the problem that the bottom pads will cover over the top tracks.
  • Solve the problem that rounded corners will appear when copper areas overlap with the same network.
  • Improve theme setting of schematic diagram to avoid ambiguity.
  • Reset the canvas coordinates as the copper and solid fills' edit coordinates.
  • Components with subpart no longer support placing father-part. Only separate subparts are allowed.
  • Improve tracks drag to reduce acute angles.
  • Press 'D' to drag footprint's text without moving footprint.
  • Modify subpart properties support synchronous modification of other subpart properties.
  • Components' prefix and name text do not allow line breaks.
  • Double-click the normal text, Enter directly confirm input, Ctrl+Enter change to new line.
  • Fixed problems where clicking exit did not succeed
  • Remove component's prefix and name when ungroup it, to avoid recombination of anomalies.
  • Change parts searching keywords to at least two.
  • Limit the remove loop to only support the signal layer.
  • Remove must save the file before exporting the Altium format logic.
  • Fix other bugs.
你现在访问的是EasyEDA海外版,建议访问速度更快的国内版 https://lceda.cn(需要重新注册)
如果需要转移工程请在个人中心 - 工程 - 工程高级设置 - 下载工程,下载后在https://lceda.cn/editor 打开保存即可。
有问题联系QQ 3001956291 不再提醒
svg-battery svg-battery-wifi svg-books svg-more svg-paste svg-pencil svg-plant svg-ruler svg-share svg-user svg-logo-cn svg-double-arrow -mockplus- -mockplus- -mockplus- -mockplus- -mockplus- -mockplus- -mockplus- -mockplus-@1x -mockplus-

Cookie Notice

Our website uses essential cookies to help us ensure that it is working as expected, and uses optional analytics cookies to offer you a better browsing experience. To find out more, read our Cookie Notice